Hardware Architectures for Post-Quantum Cryptography - the Niederreiter Cryptosystem

05.07.2018 11:00-12:00

Hardware Architectures for Post-Quantum Cryptography – the Niederreiter Cryptosystem

05.07.2018, 11:00 – 12:00

Speaker: Wen Wang, Yale University, USA | Location: Hochschulstraße 10 (S2|02), Piloty Building, Room B002, Darmstadt

Organizer: Moritz Horsch, CROSSING

Abstract

Post-quantum cryptography has received increased attention recently most noticeably due to a standardization process for PQC schemes started by NIST in 2017. “Classical McEliece” is one of the code-based PKE/KEM submissions to the NIST PQC “competition”. This presentation will focus on presenting the FPGA-based design of this scheme, namely a Goppa code-based Niederreiter cryptosystem, including modules for encryption, decryption, and key generation. We will show how to make the design constant-time in order to protect against timing side-channel analysis and how to make the design fully parameterized in order to support a wide range of parameter choices for security, including binary field size, the degree of the Goppa polynomial, and the code length. The parameterized design also allows users to choose design parameters for time-area trade-offs in order to support a large variety of applications ranging from smart cards to server accelerators. By comparing the performance with related work, we will show that our current work is the fastest design to date, beating prior FPGA work and optimized CPU-based implementations on recent processors.

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